X1500
Low Power Image Recognition Micro-processor
  • XBurst®1, Frequency at 1.0GHz
  • 32MB LPDDR in Package
  • Built-in Advanced ISP
  • Peripheral Interfaces
  • Sample Application
    Chip Block Diagram
    Chip Specifications
    CPU
    XBurst®1, up to 1.0GHz,MIPS ISA
    16KB L1 I-cache and 16KB L1 D-cache
    128KB L2 unified cache
    Memory
    Integrated 32MBytes SIP LPDDR
    Camera
    Hardware JPEG encoder
    Support ITU656(YCbCr 4:2:2)input
    Input images size up to 2.0M Pixels
    Audio
    16 bits interface and 20bit precision internal controller
    Low power DMIC controller with voice trigger engine
    On-chip Peripherals
    - General-Purpose I/O ports
    - Three I2C Controller(I2C0,I2C1,I2C2)
    - One Synchronous serial interfaces(SSI0)
    - Three UARTs(UART0,UART1,UART2)
    - One MMC/SD/SDIO controllers
    - USB 2.0 OTG
    - OTP
    Boot Rom
    16KB Boot ROM
    Support security boot
    Package
    BGA-109, 8mm x 8mm x 1.2mm, 0.65mm Pitch
    Data Download
    X1500 Product Brief
    Download
    X1500 Data Sheet
    Download
    T41 INDUS 开发套板
    芯片:T41LQ
    芯片:T41LQ
    Development Board Application Form
    Proxy Company Information
    Customer Company Information
    Specific Model for Development Board Application