Core Idea: Autonomous instruction set is the premise of controllable ecosystem. How Beijing Ingenic Semiconductors leverages open source to achieve strategic transformation.
1.The MIPS Era: Independent Exploration within a Compatible Ecosystem
In its early development, Beijing Ingenic Semiconductors chose the MIPS instruction set based on two key considerations:
Technical Suitability: The MIPS instruction set is streamlined and efficient, with lower power consumption than ARM for the same performance, making it suitable for the energy efficiency demands of embedded scenarios.
Licensing Flexibility: MIPS allows vendors to independently design cores through architectural licensing, providing Ingenic with room for underlying innovation.
Through instruction set extensions, Ingenic further enhanced its technological competitiveness:
SIMD Instruction Optimization: Supports -bit parallel computing, enhancing multimedia processing efficiency.
AI Instruction Extension: Customized instruction sets for scenarios such as image recognition and voice processing, boosting AI computing power.
However, the limitations of the MIPS ecosystem gradually emerged:
Weak Software Ecosystem: Development toolchains and operating system adaptations lagged behind ARM.
Market Fragmentation: MIPS failed to form unified application scenarios, limiting scaled development.
2.The RISC-V Strategy: An Inevitable Choice for the Open Source Ecosystem
To break through the ecological bottleneck, Ingenic shifted to the RISC-V architecture from onwards, with advantages in two areas:
Technical Advantages: Modularity and Autonomous Control
On-Demand Instruction Set Tailoring: RISC-V's modular design allows Ingenic to combine instructions as per scenario requirements, avoiding redundant hardware (e.g., the Victory series only retains necessary instructions, reducing chip costs).
Vector Instruction Extension: Compatible with RV2GC/RVGC basic instructions, with newly added efficient vector computing units supporting AI inference acceleration. Taking Victory2 as an example, its performance is comparable to ARM Cortex-A, and its vector computing unit significantly enhances computing power in image processing tasks.
Ecological Potential: Open Source Collaboration and High Customization
Breaking the Monopoly: RISC-V's open-source nature attracts global developers, rapidly improving the toolchain and compiler ecosystem.
Ingenic's self-developed Victory series CPU cores and NPUs are deeply integrated, enabling customized solutions for "AI computing + real-time control" in scenarios such as smart homes and industrial control.
3.Hybrid Architecture: The Practical Wisdom of Smooth Transition
Before fully transitioning to RISC-V, Ingenic adopted a heterogeneous design of "MIPS computing core + RISC-V control core," balancing performance and ecological compatibility:
X Chip Case:
XBurst (MIPS): Responsible for high-performance computing (e.g., printer image rendering, robot path planning); supports dual ISPs and dual Gigabit Ethernet.
Victory0 (RISC-V): Manages real-time tasks and low-power scheduling (e.g., device sleep/wake, sensor data acquisition).
This hybrid architecture design skillfully balances the challenges and opportunities of the technological transition period:
Continuing MIPS Ecological Value: Retains existing customer and developer resources, ensuring product compatibility and market continuity.
Accumulating RISC-V Experience: Verifies the reliability of RISC-V through the control core, providing technical endorsement for a full transition to the open-source ecosystem.
4.Insights: A Gradual Path to Ecological Autonomy
Ingenic's instruction set transformation provides a reusable methodology for domestic chips:
Compatible with Existing Ecosystems: Initially leveraging MIPS for technological accumulation and commercial validation.
Embracing Open Source: Leveraging RISC-V to break through ecological barriers and reduce dependence on closed architectures.
Autonomous Innovation: Expanding differentiated capabilities based on open-source architectures (e.g., AI instruction sets, multi-core collaborative design).
Industry Value:
Ingenic's hybrid architecture practice demonstrates that domestic chips do not need a "one-size-fits-all" replacement technology route and can achieve a smooth transition through incremental innovation.
RISC-V's modularity and openness create opportunities for domestic chips to "change lanes and overtake" in emerging fields such as AIoT and industrial automation.
Conclusion
The transition from MIPS to RISC-V is not only a technological choice for Ingenic but also a microcosm of domestic chip ecological autonomy. By following the three-step approach of compatibility, open source, and innovation, Ingenic demonstrates a "controllable, gradual, and sustainable" path of ecological reconstruction for the industry. In the future, as the RISC-V ecosystem matures, domestic chips are expected to achieve a leap from "following the ecosystem" to "defining the ecosystem" in more fields.
Series Introduction
This article is the second installment of the "Ingenic Technology Series", comprising three parts.
Published:
Part 1: Breaking the Monopoly——Decoding the Path to Autonomous Breakthrough in Domestic CPU Core Design23
Upcoming:
Part 3: Paradigm Upgrade——The Leap from Technological Followership to Autonomous Leadership3
